High-Level Energy Estimation for DSP Systems

A new approach for estimating Digital Signal Processors’ energy consumption is presented. Our energy consumption model is based on a functional analysis of the DSP’s core. Several consumption rules are determined. They give, from specific parameters extracted from the algorithm’s source code, the consumption of every functional block in the DSP, and lead to the application’s overall energy consumption. The last generation Texas Instruments C6201 is studied; the methodology is not restricted to this sole processor however. The method is finally demonstrated on a classical signal processing algorithm; the gap between measures and estimations is lower than 8%.